* Library of Advanced Linear Devices, Inc. Opamp Models * * $Revision: 1.6 $ * $Author: ANW $ * $Date: 12 Jan 1995 15:05:18 $ * ----------------------------------------------------------------------------- * Copyright 2002 Advanced Linear Devices, Inc. * Neither this library nor any part may be copied without the express * written consent of Advanced Linear Devices, Inc. * PSPICE version * ----------------------------------------------------------------------------- * * This library of macromodels is being supplied to users as an aid to circuit * design. While it reflects reasonably close similarity to the actual device * in terms of performance, it is not suggested as a replacement for bread- * boarding. Simulation should be used as a forerunner or a supplement to * traditional lab testing. * * Users should very carefully note the following factors regarding these * models: * * Model performance in general will reflect typical baseline specs for a * given device, and certain aspects of performance may not be modeled * fully. * * While reasonable care has been taken in their preparation, we cannot be * responsible for correct application on any and all computer systems. * * In all cases, the current data sheet information for a given real device * is your final design guideline, and is the only actual performance * guarantee. For further technical information, refer to individual device * data sheets. * * Model users are hereby notified that these models are supplied "as is", * with no direct or implied responsibility on the part of Advanced Linear * Devices for their operation within a customer circuit or system. Further, * ALD reserves the right to change these models without prior notice. * * The macromodels listed in this library represent typical operational * amplifier characteristics, without offset (Vos) adjustment, or other * parameters that would allow for Monte Carlo simulation of these circuits. * * Advanced Linear Devices provides a separate library of ASIC standard cell * functions such as operational amplifiers, timers, and comparators as well * as resistors, capacitors, and individual transistors and diodes for func- * tion specific integrated circuit design. This ASIC verification library * contains a comprehensive set of parametric values to be used in Monte * Carlo simulation of user designed integrated circuits. Contact your * Advanced Linear Devices representative for more information. * ----------------------------------------------------------------------------- * * Your feedback and suggestions on these (and future) models will be * appreciated. * * * Advanced Linear Devices, Inc. * Customer Support Group * 1180F Miraloma Way * Sunnyvale, California. 94086-4606 * Tel: (408) 720-8737 * Fax: (408) 720-8297 * ----------------------------------------------------------------------------- * * *$ * 1701 operational amplifier "macromodel" subcircuit * Created by Advanced Linear Devices 1/16/91. * * connections: non-inverting input * | inverting input * | | positive power supply * | | | negative power supply * | | | | output * | | | | | .subckt ald1701/AL 1 2 3 4 5 * c1 11 12 4.5E-12 c2 6 7 15.00E-12 d13 1 3 dx d41 4 1 dx d23 2 3 dx d32 4 2 dx dc 5 53 dy de 54 5 dy dlp 90 91 dy dln 92 90 dy dp 4 3 dx egnd 99 0 poly(2) (3,0) (4,0) 0 .5 .5 fb 7 99 poly(5) vb vc ve vlp vln 0 40E3 -40E3 40E3 40E3 -40E3 ga 6 0 11 12 500.0E-6 gcm 0 6 10 10x 4.4E-9 iss 3 10 dc 1.40E-6 isx 3 10x dc .70E-6 hlim 90 0 vlim 1K m1 11 2 10 3x mx m2 12 1 10 3x mx m3 12x 99 10x 3x mx r2 6 9 100.0E3 rd1 4 11 15.E3 rd2 4 12 15.E3 rd3 4 12x 15.E3 ro1 8 5 200 ro2 7 99 145E3 rp 3 4 20.0E3 vb 9 0 dc 0 vc 3 53 dc 75.00E-3 ve 54 4 dc 75.00E-3 vlim 7 8 dc 0 vlp 91 0 dc 1 vln 0 92 dc 1 vx 3x 3 dc .98 .model dx D(Is=1.0E-15 cjo=.3p) .model dy D(Is=1.0E-15 n=.1) .model mx pmos (level=1 vto=-.82 KP=45E-6 cgbo=9e-9 gamma=0) .ends *$ * * 1702 operational amplifier "macromodel" subcircuits * Created by Advanced Linear Devices 1/16/91. * * connections: non-inverting input * | inverting input * | | positive power supply * | | | negative power supply * | | | | output * | | | | | .subckt ald1702/AL 1 2 3 4 5 * c1 11 12 1.7E-12 c2 6 7 27.27E-12 d13 1 3 dx d41 4 1 dx d23 2 3 dx d32 4 2 dx dc 5 53 dy de 54 5 dy dlp 90 91 dy dln 92 90 dy dp 4 3 dx egnd 99 0 poly(2) (3,0) (4,0) 0 .5 .5 fb 7 99 poly(5) vb vc ve vlp vln 0 37.7E3 -50E3 50E3 50E3 -50E3 ga 6 0 11 12 872E-6 gcm 0 6 10 10x 19E-9 iss 3 10 dc 5.0E-6 isx 3 10x dc 2.5E-6 hlim 90 0 vlim .1k m1 11 2 10 3x mx m2 12 1 10 3x mx m3 12x 99 10x 3x mx r2 6 9 100E3 rd1 4 11 13.35E3 rd2 4 12 13.35E3 rd3 4 12x 13.35E3 ro1 8 5 1.0E2 ro2 7 99 43.0E3 rp 3 4 4.54E3 vb 9 0 dc 0.0 vc 3 53 dc 90.00E-3 ve 54 4 dc 90.00E-3 vlim 7 8 dc 0 vlp 91 0 dc 0.8 vln 0 92 dc 0.8 vx 3x 3 dc 1.03 .model dx D(Is=1.0E-15 cjo=.3p) .model dy D(Is=1.0E-15 n=.1) .model mx pmos (level=1 vto=-.85 KP=116E-6 cgbo=9.0e-9 gamma=0) .ends *$ * * 1703 operational amplifier "macromodel" subcircuits * Created by Advanced Linear Devices 1/16/91. * * connections: non-inverting input * | inverting input * | | positive power supply * | | | negative power supply * | | | | output * | | | | | .subckt ald1703/AL 1 2 3 4 5 * c1 11 12 1.7E-12 c2 6 7 27.27E-12 d13 1 3 dx d41 4 1 dx d23 2 3 dx d32 4 2 dx dc 5 53 dy de 54 5 dy dlp 90 91 dy dln 92 90 dy dp 4 3 dx egnd 99 0 poly(2) (3,0) (4,0) 0 .5 .5 fb 7 99 poly(5) vb vc ve vlp vln 0 37.7E3 -50E3 50E3 50E3 -50E3 ga 6 0 11 12 872E-6 gcm 0 6 10 10x 18E-9 iss 3 10 dc 5.0E-6 isx 3 10x dc 2.5E-6 hlim 90 0 vlim .1k m1 11 2 10 3x mx m2 12 1 10 3x mx m3 12x 99 10x 3x mx r2 6 9 100E3 rd1 4 11 13.35E3 rd2 4 12 13.35E3 rd3 4 12x 13.35E3 ro1 8 5 1.0E2 ro2 7 99 43.0E3 rp 3 4 4.54E3 vb 9 0 dc 0.0 vc 3 53 dc 90.00E-3 ve 54 4 dc 90.00E-3 vlim 7 8 dc 0 vlp 91 0 dc 0.8 vln 0 92 dc 0.8 vx 3x 3 dc -.7 .model dx D(Is=1.0E-15 cjo=.3p) .model dy D(Is=1.0E-15 n=.1) .model mx pmos (level=1 vto=+.25 KP=116E-6 cgbo=9.0e-9 gamma=0) .ends *$ * * 1704 operational amplifier "macromodel" subcircuit * Created by Advanced Linear Devices 1/16/91. * * connections: non-inverting input * | inverting input * | | positive power supply * | | | negative power supply * | | | | output * | | | | | .subckt ald1704/AL 1 2 3 4 5 * c1 11 12 1.5E-12 c2 6 7 30.E-12 d13 1 3 dx d41 4 1 dx d23 2 3 dx d32 4 2 dx dc 5 53 dy de 54 5 dy dlp 90 91 dy dln 92 90 dy dp 4 3 dx egnd 99 0 poly(2) (3,0) (4,0) 0 .5 .5 fb 7 99 poly(5) vb vc ve vlp vln 0 88E3 -50E3 50E3 50E3 -50E3 ga 6 0 11 12 1200E-6 gcm 0 6 10 10x 50E-9 iss 3 10 dc 15.E-6 isx 3 10x dc 7.5E-6 hlim 90 0 vlim .1k m1 11 2 10 3x mx m2 12 1 10 3x mx m3 12x 99 10x 3x mx r2 6 9 100E3 rd1 4 11 13.35E3 rd2 4 12 13.35E3 rd3 4 12x 13.35E3 ro1 8 5 3.3E1 ro2 7 99 4.46E3 rp 3 4 4.54E3 vb 9 0 dc 0.0 vc 3 53 dc 90.00E-3 ve 54 4 dc 90.00E-3 vlim 7 8 dc 0 vlp 91 0 dc 0.8 vln 0 92 dc 0.8 vx 3x 3 dc 1.03 .model dx D(Is=1.0E-15 cjo=.3p) .model dy D(Is=1.0E-15 n=.1) .model mx pmos (level=1 vto=-.85 KP=116E-6 cgbo=9.0e-9 gamma=0) .ends *$ * * 1706 operational amplifier "macromodel" subcircuit * Created by Advanced Linear Devices 1/16/91. * * connections: non-inverting input * | inverting input * | | positive power supply * | | | negative power supply * | | | | output * | | | | | .subckt ald1706/AL 1 2 3 4 5 * c1 11 12 15.3E-12 c2 6 7 10.90E-12 d13 1 3 dx d41 4 1 dx d23 2 3 dx d32 4 2 dx dc 5 53 dy de 54 5 dy dlp 90 91 dy dln 92 90 dy dp 4 3 dx egnd 99 0 poly(2) (3,0) (4,0) 0 .5 .5 fb 7 99 poly(5) vb vc ve vlp vln 0 125E3 -40E3 40E3 40E3 -40E3 ga 6 0 11 12 500E-6 gcm 0 6 10 10x 2.04E-9 iss 3 10 dc .34E-6 isx 3 10x dc .17E-6 hlim 90 0 vlim 10K m1 11 2 10 3x mx m2 12 1 10 3x mx m3 12x 99 10x 3x mx r2 6 9 100.0E3 rd1 4 11 15.E3 rd2 4 12 15.E3 rd3 4 12x 15.E3 ro1 8 5 200 ro2 7 99 47.1E3 rp 3 4 250E3 vb 9 0 dc 0 vc 3 53 dc 156E-3 ve 54 4 dc 156E-3 vlim 7 8 dc 0 vlp 91 0 dc 2 vln 0 92 dc 2 vx 3x 3 dc .98 .model dx D(Is=1.0E-15 cjo=.3p) .model dy D(Is=1.0E-15 n=.1) .model mx pmos (level=1 vto=-.81 KP=45E-6 cgbo=9e-9 gamma=0) .ends * *$ * 1701 operational amplifier "macromodel" subcircuits * Created by Advanced Linear Devices 1/16/91. * * 4701/pb/db/sf * .subckt ald4701/pb/AL 1 2 3 4 5 6 7 8 9 10 11 12 13 14 x1 3 2 4 11 1 ald1701/AL x2 5 6 4 11 7 ald1701/AL x3 10 9 4 11 8 ald1701/AL x4 12 13 4 11 14 ald1701/AL .ends *$ * .subckt ald4701/db/AL 1 2 3 4 5 6 7 8 9 10 11 12 13 14 x1 3 2 4 11 1 ald1701/AL x2 5 6 4 11 7 ald1701/AL x3 10 9 4 11 8 ald1701/AL x4 12 13 4 11 14 ald1701/AL .ends *$ * .subckt ald4701/sf/AL 1 3 5 6 8 10 12 13 15 17 19 20 22 24 x1 5 3 6 19 1 ald1701/AL x2 8 10 6 19 12 ald1701/AL x3 17 15 6 19 13 ald1701/AL x4 20 22 6 19 24 ald1701/AL .ends *$ * device pins: . . . . . . . . .subckt ald2701/sb/AL 1 2 4 6 7 10 11 12 x1 2 1 11 4 12 ald1701/AL x2 6 7 11 4 10 ald1701/AL .ends *$ * device pins: . . . . . . . . .subckt ald2701/sa/AL 1 2 3 4 5 6 7 8 x1 3 2 8 4 1 ald1701/AL x2 5 6 8 4 7 ald1701/AL .ends *$ * device pins: . . . . . . . . .subckt ald2701/pa/AL 1 2 3 4 5 6 7 8 x1 3 2 8 4 1 ald1701/AL x2 5 6 8 4 7 ald1701/AL .ends *$ * device pins: . . . . . . . . .subckt ald2701/da/AL 1 2 3 4 5 6 7 8 x1 3 2 8 4 1 ald1701/AL x2 5 6 8 4 7 ald1701/AL .ends *$ * device pins: . . . . . .subckt ald1701/pa/AL 2 3 4 6 7 x1 3 2 7 4 6 ald1701/AL .ends *$ * device pins: . . . . . .subckt ald1701/da/AL 2 3 4 6 7 x1 3 2 7 4 6 ald1701/AL .ends *$ * device pins: . . . . . .subckt ald1701/sa/AL 2 3 4 6 7 x1 3 2 7 4 6 ald1701/AL .ends *$ * * 1702 operational amplifier "macromodel" subcircuits * Created by Advanced Linear Devices 1/16/91. * .subckt ald1702/da/AL 2 3 4 6 7 x1 3 2 7 4 6 ald1702/Al .ends *$ * .subckt ald1702/pa/AL 2 3 4 6 7 x1 3 2 7 4 6 ald1702/Al .ends *$ * .subckt ald1702/sa/AL 2 3 4 6 7 x1 3 2 7 4 6 ald1702/AL .ends *$ * * 1703 operational amplifier "macromodel" subcircuits * Created by Advanced Linear Devices 1/16/91. * .subckt ald1703/pa/AL 2 3 4 6 7 x1 3 2 7 4 6 ald1703/Al .ends *$ * .subckt ald1703/sa/AL 2 3 4 6 7 x1 3 2 7 4 6 ald1703/AL .ends *$ * .subckt ald1703/da/AL 2 3 4 6 7 x1 3 2 7 4 6 ald1703/AL .ends *$ * * 1704 operational amplifier "macromodel" subcircuit * Created by Advanced Linear Devices 1/16/91. * .subckt ald1704/da/AL 2 3 4 6 7 x1 3 2 7 4 6 ald1704/Al .ends *$ * .subckt ald1704/pa/AL 2 3 4 6 7 x1 3 2 7 4 6 ald1704/AL .ends *$ * .subckt ald1704/sa/AL 2 3 4 6 7 x1 3 2 7 4 6 ald1704/AL .ends *$ * * 1706 operational amplifier "macromodel" subcircuit * Created by Advanced Linear Devices 1/16/91. * * ald4706/pb/db/sf .subckt ald4706/pb/AL 1 2 3 4 5 6 7 8 9 10 11 12 13 14 x1 3 2 4 11 1 ald1706/AL x2 5 6 4 11 7 ald1706/AL x3 10 9 4 11 8 ald1706/AL x4 12 13 4 11 14 ald1706/AL .ends *$ * .subckt ald4706/db/AL 1 2 3 4 5 6 7 8 9 10 11 12 13 14 x1 3 2 4 11 1 ald1706/AL x2 5 6 4 11 7 ald1706/AL x3 10 9 4 11 8 ald1706/AL x4 12 13 4 11 14 ald1706/AL .ends *$ * .subckt ald4706/sf/AL 1 3 5 6 8 10 12 13 15 17 19 20 22 24 x1 5 3 6 19 1 ald1706/AL x2 8 10 6 19 12 ald1706/AL x3 17 15 6 19 13 ald1706/AL x4 20 22 6 19 24 ald1706/AL .ends *$ * .subckt ald2706/da/AL 1 2 3 4 5 6 7 8 x1 3 2 8 4 1 ald1706/AL x2 5 6 8 4 7 ald1706/AL .ends *$ * .subckt ald2706/pa/AL 1 2 3 4 5 6 7 8 x1 3 2 8 4 1 ald1706/AL x2 5 6 8 4 7 ald1706/AL .ends *$ * .subckt ald2706/sa/AL 1 2 3 4 5 6 7 8 x1 3 2 8 4 1 ald1706/AL x2 5 6 8 4 7 ald1706/AL .ends *$ * .subckt ald2706/sb/AL 1 2 4 6 7 10 11 12 x1 2 1 11 4 12 ald1706/AL x2 6 7 11 4 10 ald1706/AL .ends *$ * .subckt ald1706/da/AL 3 2 7 4 6 x1 3 2 7 4 6 ald1706/AL .ends *$ * .subckt ald1706/pa/AL 3 2 7 4 6 x1 3 2 7 4 6 ald1706/AL .ends *$ * .subckt ald1706/sa/AL 3 2 7 4 6 x1 3 2 7 4 6 ald1706/AL .ends *$