;REV.  1.5    22 February 1999
;ADuC812   Apps, Analog Devices Inc.
P0       DATA  080H  ;PORT 0	
SP       DATA  081H  ;STACK POINTER	
DPL      DATA  082H  ;DATA POINTER - LOW BYTE
DPH      DATA  083H  ;DATA POINTER - HIGH BYTE
DPP      DATA  084H  ;DATA POINTER - PAGE BYTE
PCON     DATA  087H  ;POWER CONTROL
TCON     DATA  088H  ;TIMER CONTROL
TMOD     DATA  089H  ;TIMER MODE
TL0      DATA  08AH  ;TIMER 0 - LOW BYTE
TL1      DATA  08BH  ;TIMER 1 - LOW BYTE
TH0      DATA  08CH  ;TIMER 0 - HIGH BYTE
TH1      DATA  08DH  ;TIMER 1 - HIGH BYTE
P1       DATA  090H  ;PORT 1
SCON     DATA  098H  ;SERIAL PORT CONTROL
SBUF     DATA  099H  ;SERIAL PORT BUFFER
I2CDAT   DATA  09AH  ;I2C DATA BUFFER
I2CADD   DATA  09BH  ;I2C ADDRESS
P2       DATA  0A0H  ;PORT 2
IE       DATA  0A8H  ;INTERRUPT ENABLE 1
IE2      DATA  0A9H  ;INTERRUPT ENABLE 2
P3       DATA  0B0H  ;PORT 3
IP       DATA  0B8H  ;INTERRUPT PRIORITY
ECON     DATA  0B9H  ;FLASH EEPROM CONTROL
ETIM1    DATA  0BAH
ETIM2    DATA  0BBH  ;FLASH EEPROM TIMING2
EDATA1   DATA  0BCH  ;FLASH EEPROM DATA1 
EDATA2   DATA  0BDH  ;FLASH EEPROM DATA2 
EDATA3   DATA  0BEH  ;FLASH EEPROM DATA3 
EDATA4   DATA  0BFH  ;FLASH EEPROM DATA4 
WDCON    DATA  0C0H  ;WATCHDOG TIMER CONTROL
ETIM3    DATA  0C4H  ;FLASH EEPROM TIMING3
EADRL    DATA  0C6H  ;FLASH EEPROM PAGE ADDRESS
T2CON    DATA  0C8H  ;TIMER 2 CONTROL
RCAP2L   DATA  0CAH  ;TIMER 2 CAPTURE REGISTER - LOW BYTE
RCAP2H   DATA  0CBH  ;TIMER 2 CAPTURE REGISTER - HIGH BYTE
TL2      DATA  0CCH  ;TIMER 2 - LOW BYTE
TH2      DATA  0CDH  ;TIMER 2 - HIGH BYTE
PSW      DATA  0D0H  ;PROGRAM STATUS WORD
DMAL     DATA  0D2H  ;DMA ADDRESS LOW BYTE
DMAH     DATA  0D3H  ;DMA ADDRESS HIGH BYTE
DMAP     DATA  0D4H  ;DMA ADDRESS PAGE BYTE
ADCCON2  DATA  0D8H  ;ADC CONTROL
ADCDATAL DATA  0D9H  ;ADC DATA LOW BYTE
ADCDATAH DATA  0DAH  ;ADC DATA HIGH BYTE
PSMCON   DATA  0DFH  ;POWER SUPPLY MONITOR
ACC      DATA  0E0H  ;ACCUMULATOR
I2CCON   DATA  0E8H  ;I2C CONTROL
ADCCON1  DATA  0EFH  ;ADC CONTROL
B        DATA  0F0H  ;MULTIPLICATION REGISTER
ADCOFSL  DATA  0F1H  ;ADC OFFSET LOW BYTE
ADCOFSH  DATA  0F2H  ;ADC OFFSET HIGH BYTE
ADCGAINL DATA  0F3H  ;ADC GAIN LOW BYTE
ADCGAINH DATA  0F4H  ;ADC GAIN HIGH BYTE
ADCCON3  DATA  0F5H  ;ADC CONTROL
SPIDAT   DATA  0F7H  ;SPI DATA REGISTER
SPICON   DATA  0F8H  ;SPI CONTROL REGISTER
DAC0L    DATA  0F9H  ;DAC0 LOW BYTE
DAC0H    DATA  0FAH  ;DAC0 HIGH BYTE
DAC1L    DATA  0FBH  ;DAC1 LOW BYTE
DAC1H    DATA  0FCH  ;DAC1 HIGH BYTE
DACCON   DATA  0FDH  ;DAC CONTROL REGISTER
IT0      BIT   088H  ;TCON.0 - EXT. INTERRUPT 0 TYPE
IE0      BIT   089H  ;TCON.1 - EXT. INTERRUPT 0 EDGE FLAG
IT1      BIT   08AH  ;TCON.2 - EXT. INTERRUPT 1 TYPE
IE1      BIT   08BH  ;TCON.3 - EXT. INTERRUPT 1 EDGE FLAG
TR0      BIT   08CH  ;TCON.4 - TIMER 0 ON/OFF CONTROL
TF0      BIT   08DH  ;TCON.5 - TIMER 0 OVERFLOW FLAG
TR1      BIT   08EH  ;TCON.6 - TIMER 1 ON/OFF CONTROL
TF1      BIT   08FH  ;TCON.7 - TIMER 1 OVERFLOW FLAG
T2       BIT   090H  ;P1.0 - TIMER 2 TRIGGER INPUT
T2EX     BIT   091H  ;P1.1 - TIMER 2 COUNT INPUT
RI       BIT   098H  ;SCON.0 - RECEIVE INTERRUPT FLAG
TI       BIT   099H  ;SCON.1 - TRANSMIT INTERRUPT FLAG
RB8      BIT   09AH  ;SCON.2 - RECEIVE BIT 8
TB8      BIT   09BH  ;SCON.3 - TRANSMIT BIT 8
REN      BIT   09CH  ;SCON.4 - RECEIVE ENABLE
SM2      BIT   09DH  ;SCON.5 - SERIAL MODE CONTROL BIT 2
SM1      BIT   09EH  ;SCON.6 - SERIAL MODE CONTROL BIT 1
SM0      BIT   09FH  ;SCON.7 - SERIAL MODE CONTROL BIT 0
EX0      BIT   0A8H  ;IE.0 - EXTERNAL INTERRUPT 0 ENABLE
ET0      BIT   0A9H  ;IE.1 - TIMER 0 INTERRUPT ENABLE
EX1      BIT   0AAH  ;IE.2 - EXTERNAL INTERRUPT 1 ENABLE
ET1      BIT   0ABH  ;IE.3 - TIMER 1 INTERRUPT ENABLE
ES       BIT   0ACH  ;IE.4 - SERIAL PORT INTERRUPT ENABLE
ET2      BIT   0ADH  ;IE.5 - TIMER 2 INTERRUPT ENABLE
EADC     BIT   0AEH  ;IE.6 - ENABLE ADC INTURRUPT
EA       BIT   0AFH  ;IE.7 - GLOBAL INTERRUPT ENABLE
RXD      BIT   0B0H  ;P3.0 - SERIAL PORT RECEIVE INPUT
TXD      BIT   0B1H  ;P3.1 - SERIAL PORT TRANSMIT OUTPUT
INT0     BIT   0B2H  ;P3.2 - EXTERNAL INTERRUPT 0 INPUT
INT1     BIT   0B3H  ;P3.3 - EXTERNAL INTERRUPT 1 INPUT
T0       BIT   0B4H  ;P3.4 - TIMER 0 COUNT INPUT
T1       BIT   0B5H  ;P3.5 - TIMER 1 COUNT INPUT
WR       BIT   0B6H  ;P3.6 - WRITE CONTROL FOR EXT. MEMORY
RD       BIT   0B7H  ;P3.7 - READ CONTROL FOR EXT. MEMORY
PX0      BIT   0B8H  ;IP.0 - EXTERNAL INTERRUPT 0 PRIORITY
PT0      BIT   0B9H  ;IP.1 - TIMER 0 PRIORITY
PX1      BIT   0BAH  ;IP.2 - EXTERNAL INTERRUPT 1 PRIORITY
PT1      BIT   0BBH  ;IP.3 - TIMER 1 PRIORITY
PS       BIT   0BCH  ;IP.4 - SERIAL PORT PRIORITY
PT2      BIT   0BDH  ;IP.5 - TIMER 2 PRIORITY
PADC     BIT   0BEH  ;IP.6 - ADC PRIORITY
PSI      BIT   0BFH  ;IP.7 - SPI OR 2-WIRE SERIAL INTERFACE PRIORITY
WDE      BIT   0C0H  ;WDCON.0 - WATCHDOG ENABLE
WDS      BIT   0C1H  ;WDCON.1 - WATCHDOG STATUS
WDR2     BIT   0C2H  ;WDCON.2 - WATCHDOG TIMER REFRESH BIT2
WDR1     BIT   0C3H  ;WDCON.3 - WATCHDOG TIMER REFRESH BIT1
PRE0     BIT   0C5H  ;WDCON.5 - WATCHDOG TIMEOUT SELECTION BIT0
PRE1     BIT   0C6H  ;WDCON.6 - WATCHDOG TIMEOUT SELECTION BIT1
PRE2     BIT   0C7H  ;WDCON.7 - WATCHDOG TIMEOUT SELECTION BIT2
CAP2     BIT   0C8H  ;T2CON.0 - CAPTURE OR RELOAD SELECT
CNT2     BIT   0C9H  ;T2CON.1 - TIMER OR COUNTER SELECT
TR2      BIT   0CAH  ;T2CON.2 - TIMER 2 ON/OFF CONTROL
EXEN2    BIT   0CBH  ;T2CON.3 - TIMER 2 EXTERNAL ENABLE FLAG
TCLK     BIT   0CCH  ;T2CON.4 - TRANSMIT CLOCK SELECT
RCLK     BIT   0CDH  ;T2CON.5 - RECEIVE CLOCK SELECTT
EXF2     BIT   0CEH  ;T2CON.6 - EXTERNAL TRANSITION FLAG
TF2      BIT   0CFH  ;T2CON.7 - TIMER 2 OVERFLOW FLAG
P        BIT   0D0H  ;PSW.0 - ACCUMULATOR PARITY FLAG
F1       BIT   0D1H  ;PSW.1 - FLAG 0
OV       BIT   0D2H  ;PSW.2 - OVERFLOW FLAG
RS0      BIT   0D3H  ;PSW.3 - REGISTER BANK SELECT 0
RS1      BIT   0D4H  ;PSW.4 - REGISTER BANK SELECT 1
F0       BIT   0D5H  ;PSW.5 - FLAG 0
AC       BIT   0D6H  ;PSW.6 - AUXILIARY CARRY FLAG
CY       BIT   0D7H  ;PSW.7 - CARRY FLAG
CS0      BIT   0D8H  ;ADCCON2.0 - ADC INPUT CHANNEL SELECT BIT0
CS1      BIT   0D9H  ;ADCCON2.1 - ADC INPUT CHANNEL SELECT BIT1
CS2      BIT   0DAH  ;ADCCON2.2 - ADC INPUT CHANNEL SELECT BIT2
CS3      BIT   0DBH  ;ADCCON2.3 - ADC INPUT CHANNEL SELECT BIT3
SCONV    BIT   0DCH  ;ADCCON2.4 - SINGLE CONVERSION ENABLE
CCONV    BIT   0DDH  ;ADCCON2.5 - CONTINUOUS CONVERSION ENABLE
DMA      BIT   0DEH  ;ADCCON2.6 - DMA MODE ENABLE
ADCI     BIT   0DFH  ;ADCCON2.7 - ADC INTURRUPT FLAG
I2CI     BIT   0E8H  ;I2CCON.0 - I2C INTURRUPT FLAG
I2CTX    BIT   0E9H  ;I2CCON.1 - I2C TRANSMIT SELECT
I2CRS    BIT   0EAH  ;I2CCON.2 - I2C RESET
I2CM     BIT   0EBH  ;I2CCON.3 - I2C MASTER MODE SELECT
MDI      BIT   0ECH  ;I2CCON.4 - I2C MASTER MODE SDATA INPUT
MCO      BIT   0EDH  ;I2CCON.5 - I2C MASTER MODE SCLOCK OUTPUT
MDE      BIT   0EEH  ;I2CCON.6 - I2C MASTER MODE SDATA ENABLE
MDO      BIT   0EFH  ;I2CCON.7 - I2C MASTER MODE SDATA OUTPUT
SPR0     BIT   0F8H  ;SPICON.0 - SPI BITRATE SELECT BIT0
SPR1     BIT   0F9H  ;SPICON.1 - SPI BITRATE SELECT BIT1
CPHA     BIT   0FAH  ;SPICON.2 - SPI CLOCK PHASE SELECT
CPOL     BIT   0FBH  ;SPICON.3 - SPI CLOCK POLARITY SELECT
SPIM     BIT   0FCH  ;SPICON.4 - SPI MASTER/SLAVE MODE SELECT
SPE      BIT   0FDH  ;SPICON.5 - SPI INTERFACE ENABLE
WCOL     BIT   0FEH  ;SPICON.6 - SPI WRITE COLLISION ERROR FLAG
ISPI     BIT   0FFH  ;SPICON.7 - SPI END OF TRANSFER FLAG